1. Field of the Invention
The present invention relates to a driver IC chip, and more particularly, to a driver IC chip and a pad layout method thereof, which are capable of improving adhesion performance of a driver IC mounted through a chip-on-glass (COG) technique.
2. Description of the Related Art
Liquid crystal displays (LCD) refer to devices which displays image data by passing light through liquid crystal, using a characteristic that the alignment state of liquid crystal molecules differ depending on an applied voltage. Recently, a thin film transistor (TFT) LCD has been most actively used among the devices. The TFT LCD is fabricated through a technology for fabricating a silicon IC circuit.
The above-described LCD is an example of flat panel display devices which may include an organic light emitting diode (OLED) and the like.
FIG. 1 schematically illustrates the structure of a conventional LCD as an example of flat panel displays.
The TFT LCD includes a TFT array substrate and a color filter substrate which face each other and are bonded to each other with a predetermined space provided therebetween. The TFT LCD further includes an LCD panel 30 formed by injecting an liquid crystal layer into the predetermined space and a driving circuit for driving the LCD panel 30.
The driving circuit includes a gate driver IC 40, a source driver IC 20, a timing control unit 10, and a power supply unit (not illustrated). The gate driver IC 40 is configured to sequentially apply a scanning signal to gate lines at each frame, the source driver IC 20 is configured to drive a source line in response to the scanning signal of the gate driver IC 40, the timing control unit 10 is configured to control the gate driver IC 40 and the source driver IC 20 and output pixel data, and the power supply unit is configured to supply various voltages used in the LCD.
In general, a method for connecting the driver IC to the LCD panel may include a tape automated bonding (TAB) method and a COG method. According to the TAB method, a driver IC is mounted on a thin flexible film made of polymer, that is, a tape carrier package (TCP), and the film is connected to the LCD so as to electrically connect between the driver IC and the LCD panel. According to the COG method, the driver IC is directly mounted and connected on a glass substrate of a LCD panel through a bump.
Conventionally, the TAB method has been frequently used because the TAB method has reliable connection and may be easily improved. Recently, however, with the development of micro mounting technology, the COG method has been mainly used because the COG method is favorable to miniaturization and has a low fabrication cost.
According to the COG method, an output electrode of a driver IC is directly connected to a pad so as to integrate a substrate and the driver IC. In the COG method, a bump and the pad are bonded through conductive particles positioned between the bump and the pad.
Furthermore, driver IC chips mounted on an LCD panel are connected to each other according to a line-on-glass (LOG) method in which signal lines are directly mounted on a TFT array substrate, and receive a control signal and driving voltages from a timing control unit and a power supply unit.
FIG. 2 illustrates the pad layout of a conventional driver IC chip that is mounted according to the COG method.
Referring to FIG. 2, the driver IC chip may be formed in a rectangular shape having longitudinal sides and transverse sides on the basis of characteristics of a flat panel display device such as an LCD application.
The conventional driver IC chip 200, which is mounted according to the COG method, includes an internal circuit 210 disposed between the longitudinal sides facing each other, an input pad 220 between the internal circuit 210 and one of the longitudinal sides, and an output pad 230 disposed between the internal circuit 210 and the other of the longitudinal sides. The driver IC chip 200 may further include a plurality of power pads 241a to 241d and 242a to 242d and the like, which are disposed therein. Reference numerals 251 and 252 represent power lines formed on glass.
When all of the internal circuit, the input pad, the output pad, the power pads and the like are designed in the driver IC chip of the flat panel display device, the area of the driver IC chip must be increased. As the area of the driver IC chip is increased, the utilization efficiency of glass may be reduced.
Thus, according to the conventional method, when a source driver IC chip and a gate driver IC chip are designed, power pads are disposed at the input pad of the source driver IC chip and the gate driver IC chip, in order to reduce an area occupied by power lines and ground lines. Alternatively, the power pads may be disposed at a left or right side surface A of the source driver IC chip and the gate driver IC chip.
When the power pads are disposed at the input pad or the side surface A of the source driver IC chip and the gate driver IC chip, a force (adhesive force) for bonding the driver IC chip 200 on glass according to the COG method may not be uniformly applied onto the entire adhesion surface of the driver IC chip 200. That is, when the power pads exist only at the input pad, an adhesive force of the input pad section may be larger than an adhesive force of the output pad section. Thus, an electrical connection state of the output pad section having a relatively small adhesive force may be degraded. As a result, an image defect may occur. On the other hand, when the adhesive force of the output pad section is larger than the adhesive force of the input pad section, an electrical connection state of the power pads of the input pad section having a relatively small adhesive force may be degraded. As a result, image noise or frequency defect may occur.
In the source driver IC chip and the gate driver IC chip, the adhesive force may not be uniformly applied because of the structural problem of the pad layout, and an image defect or frequency defect may occur due to the non-uniform adhesive force.